1. Field of the Invention
The present invention relates to a method of fabricating a liquid crystal display device and a wiring structure of the LCD, and more particularly, to a method of fabricating a liquid crystal display device and a wiring structure of the LCD in which a gate line and a data line are formed of a low resistance metal.
2. Description of the Related Art
Recently, as modern society is rapidly changing to an information-oriented society, display techniques for processing a large amount of information and displaying images are actively advancing. In particular, flat panel liquid crystal displays (LCD) have been gaining in popularity due to advantageous characteristics such as slimness, lightweight, low power consumption requirements and the like. Of these, a thin film transistor liquid crystal display device (TFT-LCD) having superior color reproduction and slimming has been developed.
Generally, the LCD uses optical anisotropy and polarization of liquid crystal for its operation. Liquid crystal molecules with a thin and long structure have directionality in their configuration. Hence, by applying an electric field to the liquid crystal molecules, it is possible to control the alignment direction of the liquid crystal molecules.
To this end, by arbitrarily controlling the alignment direction of the liquid crystal molecules, the alignment of the liquid crystal molecules is varied and a polarized light is modulated by the optical anisotropy of the liquid crystal, thereby displaying image information.
Recently, an active matrix LCD (AM-LCD) in which the aforementioned thin film transistors and pixel electrodes connected to the thin film transistors are arranged in a matrix configuration is gaining popularity due to its high resolution and superior moving picture reproducing capability.
FIG. 1 is a plane view illustrating a pixel structure of a related art LCD.
Referring to FIG. 1, a plurality of gate lines 10 for applying a driving signal are arranged on a thin film transistor substrate 1 of an LCD. A plurality of data lines 30 are arranged on the thin film transistor substrate and cross the gate lines perpendicularly. A plurality of pixel regions are defined by the gate lines 10 and the data lines 30.
In a unit pixel region defined by the pair of gate lines 10 and the pair of data lines 30, a thin film transistor (TFT) serving as a switching element is arranged.
The TFT has a structure in which a gate insulating layer, a semiconductor layer 50 consisting of an amorphous silicon (a-Si) layer and an impurity-doped amorphous silicon (n+ a-Si) layer, a source electrode 60a and a drain electrode 60b are formed on a gate electrode 10a branched from the gate line 10.
The drain electrode 60b of the TFT is electrically connected with a pixel electrode 100 through a contact hole 70 within the unit pixel region defined by the gate line 10 and the data line 30.
Recently, as the resolution and screen sizes of the LCD have increased, the use of a metal with decreased resistance as the gate line and the data line has become more desirable. To enable use of the resistance metal, methods of fabricating the LCD using such a metal are being developed.
FIGS. 2A and 2B are sectional views illustrating a stack structure of a gate electrode in a fabrication method of an LCD according to a related art. Specifically, FIG. 2A shows a metal line on a substrate is formed of a single metal layer such as molybdenum (Mo) or chromium (Cr). The metal line formed of Mo or Cr is able to be chemically etched in a simple manner.
The process of forming the gate line is performed like in the process of forming the gate line of a general LCD. In other words, a metal layer of Mo or Cr is deposited on a cleaned substrate 200. A photoresist film is coated on the metal layer, and is exposed and developed using a mask, thereby forming a photoresist pattern. The metal film is etched by using the photoresist pattern as an etch mask, thereby forming a gate line and a gate electrode 201 at the same time.
FIG. 2B shows a gate line has a double layered structure consisting of an Mo metal layer and an Al alloy layer. Referring to FIG. 2B, an Al alloy layer 301 is deposited on a substrate 300, and then an Mo metal layer 301a is deposited on the Al alloy layer 301.
Since the Al alloy layer 301 has superior adhesion to the substrate and low resistance characteristics compared with the Mo metal layer 301a, the double layered structure is superior in resistance characteristic to the single layer structure of Mo or Cr shown in FIG. 2A.
The Mo metal layer 301a continuously deposited on the Al alloy layer 301 prevents an aluminum oxide (Al2O3) layer from being formed on the Al alloy layer 301, thereby decreasing a contact resistance between gate pad and pixel electrode to be formed later.
Also, the Mo metal layer 301a prevents the Al alloy layer 301 from being damaged while a photolithography process of the semiconductor layer and the metal layer is performed.
FIGS. 3A and 3B are sectional views illustrating a fabrication method of an LCD, and structures of source and drain electrodes the array substrate according to a related art. Specifically, FIG. 3A shows that a source electrode 205a and a drain electrode 205b are formed above the gate electrode 201 shown in FIG. 2A, thereby forming a TFT.
The fabrication method of the TFT will now be described in more detail.
A gate insulating layer 202 is formed on the gate electrode 201 formed of a single metal layer and a transparent substrate 200. Thereafter, a semiconductor layer 203, 204 is formed on a resultant structure of the transparent substrate 200 by depositing an amorphous silicon (a-Si) layer 203 and an impurity-doped amorphous silicon (n+ a-Si) layer 204.
Next, a single metal layer of Mo or Cr is deposited on the semiconductor layer 204 and is then etched, thereby forming a source electrode 205a and a drain electrode 205b. By the above processes, a thin film transistor having electrodes made of the aforementioned signal metal layer can be formed.
Unlike in the above, FIG. 3B shows that a source electrode and a drain electrode are formed above the gate electrode shown in FIG. 2B. That is, FIG. 3B shows that each of the electrodes of a TFT is formed in a double layered structure consisting of an Mo metal layer and an Al alloy layer.
The fabrication method of the TFT will now be described in more detail.
A gate insulating layer 302 and a semiconductor layer 303, 304 are sequentially formed on a substrate 300 and a gate electrode 301, 301a having a double layered structure consisting of an Mo metal layer 301a and an Al alloy layer 301. Next, an Mo metal layer 306, 307 and an Al alloy layer are sequentially formed on the semiconductor layer 303, 304 and are then etched, thereby forming a source electrode 305a and a drain electrode 305b, each having a triple layered structure consisting of the Mo metal layer 306, 307 and the Al alloy layer.
In the above method, the Mo metal layer 301a, 306, 307 may replaced by a Cr metal layer.
The Al alloy is generally used as a material of the gate line, and has a relatively low resistance, thereby enabling a rapid signal transmission.
The Mo (or Cr) metal layer formed on the source electrode 305a and the drain electrode 305b prevents an aluminum oxide (Al2O3) layer from being formed on the Al alloy layer 307, thereby decreasing a contact resistance between the source/drain electrode and the pixel electrode connected to a data pad later.
Also, the Mo (or Cr) metal layer functions as a buffer layer for preventing the Al alloy layer 301 from being damaged while a photolithography process of the semiconductor layer and the metal layer is performed.
However, since the single Mo or Cr layer, and the double layers of the Mo or Cr layer and the Al alloy layer are have a high resistance, it is difficult to use them in an LCD with a high resolution of greater than UXGA (1600×1200) level.
Thus, if the resistance of the electrodes or signal lines is not sufficiently low, a signal transmission delay and a signal transmission loss may be caused.